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The internal architecture of the SPEAr1340 is based on several shared subsystem logic blocks interacting through a multi-level switch fabric (BUSMATRIX). The structure of the multi-level matrix ensures data exchange between subsystem units in parallel mode, which increases the overall performance of the platform. High-performance master agents communicate directly with the memory controller, thereby reducing access time. General throughput The memory allocated to each master port can be software configured and optimized through an internal weighted round-robin arbitration scheme.

Distinctive features:

• Central processing unit
  • Two ARM Cortex A9 cores with operating frequency up to 600 MHz
  • Support for symmetric (SMP) and asymmetric (AMP) multiprocessing computing
  • 32 KB instruction cache and 32 KB L1 data cache with parity
  • 512 KB shared L2 cache with error correction code and parity
  • Asynchronous Integrity Controller Port (ACP)
  • Bus: 64-bit multilayer network-on-chip
• Memory
  • 32 KB boot memory
  • 32 KB + 4 KB internal RAM
  • Multi-port external memory controller (MPMC) DDR2-800/DDR3-1066 with 16-/32-bit data path, up to 1 GB address space with single/double error correction code
  • Controller (FSMC) of external NAND FLASH, parallel NOR FLASH and asynchronous SRAM memory
  • Serial NOR FLASH memory controller (SMI)
• Communication interfaces
  • Gigabit/Fast Ethernet port (with external physical layer GMII/RGMII/MII)
  • PCIe 2.0 RC/EP port (on-chip physical layer)
  • Host port SATA Gen. 2 (as an alternative to PCIe bus)
  • Two USB port 2.0 Host with integrated physical layer
  • USB 2.0 OTG port with integrated physical layer
  • Two UART channels (up to 5 Mbaud), IrDA compatible
  • SSP port (supports SPI and other protocols), master/slave mode, speed up to 41 Mbaud
  • Two I 2 C ports with master/slave mode
  • Memory Card Interface (MCIF)
  • Touch screen interface (4-wire, resistive)
  • Keyboard controller 6x6
  • Two CEC (Consumer Electronic Control) interface ports
  • Audio: multi-channel 7.1 sound: two I 2 S ports (8 input + 8 output channels), S/PDIF interface
• Video
  • TFT LCD controller with resolution up to 1920x1200 pixels (60 Hz), 24 bits per pixel
  • High-performance MALI200 GPU with 2D/3D graphics support, 1080p resolution, OpenGL ES 2.0, OpenVG 2.0 support
  • High-definition video decoder, resolution up to 1080p: support for compression standards H263, H264, MPEG2, MPEG4, VC1, Sorenson Spark, AVS, VPS 6-7-8, RealVideo, DivX, JPEG (67 Megapixels)
  • HD video encoder, resolution up to 1080p: support for compression standards H264, JPEG (67 Megapixels)
  • Digital video input port with alternative configuration for four camcorder inputs
• Additional features
  • Two high-performance 8-channel direct memory access controllers (DMAC)
  • Four PWM generators
  • 10-bit ADC, up to 1 MSPS (million samples per second), 8 channels with auto scan function
  • Programmable bidirectional I/O lines general purpose(GPIO) with interrupt function
  • Security: C3 cryptographic accelerator
  • Thirteen timers and real time clock
  • 510+209 one-time programmable bits
  • Built-in junction temperature monitoring sensor
  • JTAG-PTM Debug and Test Interface
  • Various low power modes
• Typical power consumption: 2.5 W
• Operating temperature range: -40…+85°C

65 nanometers is the next goal of the Zelenograd plant Angstrem-T, which will cost 300-350 million euros. The company has already submitted an application for a preferential loan for the modernization of production technologies to Vnesheconombank (VEB), Vedomosti reported this week with reference to the chairman of the board of directors of the plant, Leonid Reiman. Now Angstrem-T is preparing to launch a production line for microcircuits with a 90nm topology. Payments on the previous VEB loan, for which it was purchased, will begin in mid-2017.

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For more than ten years, ARM solutions have dominated the mobile market. On this moment they are used in more than 90 percent portable devices, all thanks to the incredible rise in popularity of smartphones. Starting with the ARMv7 microarchitecture and the first A8 processor based on it, which subsequently reached the frequency barrier of 1 GHz, smartphones rightfully began to be called mini-computers.

Then dual-core Cortex A9 chips appeared, equipped with a powerful graphics core capable of drawing images High Quality, 6-7 years ago, available only for PC. Today, Cortex A9 processors are being replaced by a new generation mobile processors Cortex A15, designed to further reduce the distance in terms of computing capabilities between mobile devices and PC.

Performance

Speaking of computing capabilities, it is worth looking at the DMIPS/MHz ratio parameter, which, although indirectly, can still be used to evaluate performance. So, for Cortex A9 it is 2.5, and in the case of Cortex A15 the DMIPS/MHz ratio is expected to be 3.5, moreover, some manufacturers promise to raise it to 4.0.

Help: DMIPS shows how many millions of instructions a processor can execute in the Dhrystone test per second.

Thus, you can expect a performance increase of 40-60 percent, but the difference in processor clock speeds should be taken into account here. For example, a dual-core 2GHz Cortex A15 chip like the upcoming Exynos 5250 should be twice as fast as a dual-core 1.5GHz Cortex A9 solution, and that's only with a single thread.

Also note that in the case of multi-threaded performance, doubling the number of cores obviously does not double the performance. According to experts, dual-core Cortex A15 chips will work, on average, 30 percent faster than modern quad-core mobile solutions.

New opportunities

Unlike the Cortex A9, whose frequency headroom was limited to 2 GHz per core, in the Cortex A15 this parameter will increase to 2.5 GHz, and the possible number of cores will increase from 4 to 8 by mid-2013.

It is also worth paying attention to the NEON support built into the Cortex A15, the ability to work with RAM with a capacity of up to 1 TB and hardware virtualization functions, which will certainly appeal to those who like to install alternative firmware.

Graphics core

The first chipset based on the Cortex A15 processor should be Samsung's Exynos 5250, which should appear this coming summer or early fall. Most likely, the new product will act as a hardware basis for a Google tablet, the announcement of which is expected at the Google I/O conference.

The new chipset will include the Mali T-604 graphics core, which will become the most powerful graphics solution in the mobile industry this year. The performance of T-604 will be twice as high as Adreno 225 and even higher than Adreno 320. Compared to previous version The Mali 400 graphics core (used in the Galaxy S2) is expected to achieve a fivefold increase in performance.

In addition, the new hardware graphics core will support Google's Renderscript, which is used for rendering user interface Android 4.0 and OpenCL instruction set.

Big.Little

Plans for using Cortex A15 various manufacturers very extensive. So Samsung plans to use this particular architecture to create the hardware platform for the new smartphone in the Nexus line, and it is not at all necessary that the Exynos 5250 will be used as the chipset. Most likely, the new Google Phone will be based on a solution built using big.Little technology with a special Cortex A7 core , used for current calculations.

Cortex A7 chips themselves, designed to replace outdated ARM11 solutions in the future, may turn out to be no less interesting. According to experts, the new chips will significantly revive the segment of low-cost Android solutions costing up to $100.

Prospects

Despite all the potential of Cortex A15, Mali T-604 and Cortex A7, they are already being replaced by 64-bit solutions based on the ARMv8 microarchitecture, which should appear in 2014. True, no one guarantees support for such solutions from software developers, as happened with 64-bit processors from Intel and AMD.

What ARMv8 will bring for Android platforms, we have yet to find out, but the Linux community is already looking enthusiastically towards 64-bit chips.